Integrated Circuits

PERFORMANCE:

Up to 600MHz, 1.67 ns instruction cycle rate 24M bits of internalon-chipDRAM memory
25 mm × 25 mm (576-ball) thermally enhanced ball grid
array package Dual-computation blockseach containing an ALU,  a multiplier, a shifter, a register file, and a communications logic unit (CLU) Dual-integer ALUs,

providing data addressing and pointer manipulation Integrated I/O includes 14-channel DMA controller, external port, four link ports, SDRAM controller, programmable
flag pins, two timers, and timer expired pin for system integration 1149.1 IEEE-compliant JTAG test access port for on chip emulation Single-precision IEEE 32-bit and extended-precision 40-bit floating-point data formats and 8-, 16-, 32-, and 64-bit fixed-point data formats.