Feature SDIO 2.0, SPI, UART 32-pin QFN package Wi-Fi Direct (P2P), soft-AP Integrated TCP/IP protocol stack Integrated TR switch, balun, LNA, power amplifier and matching network Integrated PLLs, regulators, DCXO and power management units +19.5dBm output power in 802.11b mode Power down leakage current of <10uA Integrated low power 32-bit CPU could be used as application processor SDIO 1.1/2.0, SPI, UART STBC, 1×1 MIMO, 2×1 MIMO A-MPDU & A-MSDU aggregation & 0.4ms guard interval Integrated RF switch, balun, 24dBm PA, DCXO, and PMU Integrated RISC processor, on-chip memory and external memory interfaces Integrated MAC/baseband processors Quality of Service management I2S interface for high fidelity audio applications On-chip low-dropout linear regulators for all internal supplies Proprietary spurious-free clock generation architecture Integrated WEP, TKIP, AES, and WAPI engines
Specification: 802.11 b/g/n Wake up and transmit packets in < 2ms Standby power consumption of < 1.0mW (DTIM3)
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